The production of flash memories is based on the use of MOS (Metal-Oxide-Semiconductor) devices with a floating grid embedded in the grid oxide, between the channel and the grid. The data is stored by trapping electrons in the floating grid, which acts as the memory component.
The principle of memory consists of modifying the current-voltage characteristics of a transistor according to the data stored.
Data storage consists of storing charges in the floating grid or, if applicable, in nodules. These charges induce the shift in the current-voltage curve, as represented by the arrow in FIG. 1. The data is read by looking at the current level at the reading voltage. In the example in FIG. 1, in state 0 (corresponding to a discharged grid), no current flows, in state 1 (corresponding to a charged grid), a current can flow.
The main advantage of nodules and other discrete storage devices lies in the fact that if a localized fault of the grid oxide occurs, the leak induced only discharges a single nodule and not the entire floating grid as in the case for continuous grids.
As a matter of fact, for around ten years, new memory devices comprising discrete storage devices and not conventional continuous storage devices in the floating grid have been developed to overcome the problems due to component miniaturization. In this way, discrete trapping memories can be found with materials such as nitride, so-called “high k” (i.e., high permittivity) materials or semiconductor nano-crystals.
Semiconductor nano-crystal (also referred to as nodules or dots) memories are very promising in terms of size reduction as they offer the advantage of a high integration density, low power consumption and low production cost. In this way, flash memories with silicon or germanium nano-crystals are found. In this respect, it is possible to refer, for example, to the article by Kan et al., “Nanocrystalline Ge Flash Memories: Electrical Characterization and Trap Engineering,” Advanced Materials for Micro and Nanosystems, January 2005.
The principle of these nodule memories is based on an exchange of charges between the nano-crystals and the inversion layer via a thin tunnel dielectric. The charging and discharging of the electrons and therefore of the data is performed on each nodule.
Various techniques are now available to form nano-crystals within substrates, for example, aerosol techniques, or by means of PECVD (Plasma Enhanced Chemical Vapor Deposition), or by means of implantation.
U.S. Patent Publication No. 2002/0017657 thus describes the formation of nodules by means of implantation and heat treatment. The nano-crystals are formed in the oxide layer, which will subsequently be used as a grid oxide for non-volatile memory production.
However, the formation of nodules as described in this document is limited to silicon substrates and cannot be applied to multi-layer substrates, such as SeOI (semiconductor-on-insulator) type substrates.
In fact, the presence of the semiconductor layer on the substrate surface, above the insulating layer, renders the implantation step difficult. It would in fact be necessary to apply high implantation energies inducing in particular a loss of precision of the implanted region and the creation of damage in the semiconductor film.
In addition, the presence of the semiconductor layer does not enable the application of a heat treatment, such as that described in the document. In fact, the heat treatment used is an oxidizing treatment and the oxygen present would not react with the embedded insulator layer, but on the surface, with the semiconductor layer.
U.S. Patent Application No. 2004/0108537 provides for the formation of a structure comprising a base substrate, a charge trapping region and a semiconductor layer wherein electronic components such as transistors may be produced. The trapping region comprises one or more insulator layers, wherein atomic species or nano-crystals forming trapping centers are incorporated. However, this trapping region must have a sufficient thickness for the memory to function correctly. In fact, it is difficult to form a very thin region with a satisfactory homogeneity and a satisfactory quality. However, the thicker the trapping region, the higher the voltages to be applied.
Therefore, one of the aims of the invention is to enable data storage in a semiconductor-on-insulator (SeOI) type substrate, enabling the use of lower voltages than in the prior art.